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| lt3798 1 3798f n isolated pfc flyback with minimum number of external components n v in and v out limited only by external components n active power factor correction n low harmonic distortion n no opto-coupler required n constant-current and constant-voltage regulation n accurate regulated voltage and current (5% typical) n energy star compliant (<0.5w no load operation) n thermally enhanced 16-lead msop package typical application features description isolated no opto-coupler flyback controller with active pfc the lt ? 3798 is a constant-voltage/constant-current iso- lated flyback controller that combines active power factor correction (pfc) with no opto-coupler required for output voltage feedback into a single-stage converter. a lt3798 based design can achieve a power factor of greater than 0.97 by actively modulating the input current, allowing compli- ance with most harmonic current emission requirements. the lt3798 is well suited for a wide variety of off-line applications. the input range can be scaled up or down, depending mainly on the choice of external components. efficiencies higher than 86% can be achieved with output power levels up to 100w. in addition, the lt3798 can easily be designed into high dc input applications. universal input 24w pfc bus converter v out vs i out applications n offline 5w to 100w+ applications n high dc v in isolated applications n offline bus converter (12v, 24v or 48v outputs) l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 5438499 and 7471522. 3798 ta01a v in_sense en/uvlo v in dcm fb v ref ctrl2 ctrl1 ovp gate sense intv cc gnd lt3798 comp + vc comp C 560 f 2 4.7pf 10 f 2.2nf 4:1:1 2.2f 0.1f 20 20 0.05 499k 499k 95.3k 1m d2 z1 z2 d1 d4 22pf d3 100k 100k 4.99k 90.9k ctrl3 90v to 265v ac 0.1f 40.2k 100k 16.5k 221k 4.7f 2k 24v 1a i out (a) 0 23.50 v out (v) 24.25 24.00 23.75 24.50 0.6 0.8 1 0.2 0.4 3798 ta01b vac = 265v vac = 220v vac = 120v vac = 90v
lt3798 2 3798f pin configuration absolute maximum ratings en/uvlo ...................................................................30v v in ............................................................................42v intv cc ...................................................................... 12v ctrl1, ctrl2, ctrl3 ................................................4v fb, v ref , comp + ........................................................3v vc, ovp, comp C .........................................................4v sense ......................................................................0.4v v in_sense .................................................................1ma dcm .......................................................................3ma operating temperature range (note 2) lt3798e/lt3798i................................... C40c to 125c storage temperature range .................. C65c to 150c (note 1) 1 2 3 4 5 6 7 8 ctrl1 ctrl2 ctrl3 v ref ovp vc comp + comp C 16 15 14 13 12 11 10 9 v in_sense sense gate intv cc en/uvlo v in dcm fb top view 17 gnd mse package 16-lead plastic msop ja = 50c/w, jc = 10c/w exposed pad (pin 17) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3798emse#pbf lt3798emse#trpbf 3798 16-lead plastic msop C40c to 125c lt3798imse#pbf lt3798imse#trpbf 3798 16-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ parameter conditions min typ max units input voltage range 10 38 v v in quiescent current v en/uvlo = 0.2v v en/uvlo = 1.5v, not switching 45 60 70 70 a a v in quiescent current, intv cc overdriven v intvcc = 11v 60 a v in shunt regulator voltage i = 1ma 40 v v in shunt regulator current limit 8ma intv cc quiescent current v en/uvlo = 0.2v v en/uvlo = 1.5v, not switching 12.5 1.8 15.5 2.2 17.5 2.7 a ma en/uvlo pin threshold en/uvlo pin voltage rising l 1.21 1.25 1.29 v en/uvlo pin hysteresis current en/uvlo=1v 8 10 12 a v in_sense threshold turn off 27 a v ref voltage 0 a load 200a load l l 1.97 1.95 2.0 1.98 2.03 2.03 v v ctrl1/ctrl2/ctrl3 pin bias current ctlr1/ctrl2/ctrl3 = 1v 30 na electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 18v, intv cc = 11v, unless otherwise noted. lt3798 3 3798f electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3798e is guaranteed to meet specified performance from 0c to 125c junction temperature. specification over the C40c and the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 18v, intv cc = 11v, unless otherwise noted. 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the 3798i is guaranteed to meet specified performance from C40c to 125c operating junction temperature range. note 3: current flows out of the fb pin. parameter conditions min typ max units sense current limit threshold v in_sense = 150a 96 102 107 mv minimum sense current limit threshold v in_sense = 34a 14 mv minimum sense current limit threshold v in_sense = 21a 4 mv sense input bias current current out of pin, sense = 0v 15 a fb voltage l 1.22 1.25 1.28 v fb voltage line regulation 10v < v in < 35v 0.01 0.03 %/v fb pin bias current (note 3), fb = 1v 4.05 4.25 4.4 a fb error amplifier voltage gain v vc /v fb , ctrl1=1v, ctrl2=2v, ctrl3=2v 180 v/v fb error amplifier transconductance i = 5a 170 umhos current error amplifier voltage gain v comp +/v comp C, ctrl1 = 1v, ctrl2 = 2v, ctrl3 = 2v 100 v/v current error amplifier transconductance i = 5a 50 umhos current loop voltage gain v ctrl /v sense ,1000pf cap from comp + to comp C 21 v/v dcm current turn-on threshold current out of pin 80 a maximum oscillator frequency comp + = 0.95v, v in_sense = 150a 150 khz minimum oscillator frequency comp + = 0v, v fb lt3798 4 3798f typical performance characteristics v ref vs temperature v ref vs v in sense current limit threshold vs temperature minimum oscillator frequency vs temperature backup oscillator frequency vs temperature maximum oscillator frequency vs temperature en/uvlo threshold vs temperature en/uvlo hysteresis current vs temperature v in i q vs temperature t a = 25c, unless otherwise noted. temperature (c) C50 0 50 75 C25 25 100 125 150 3798 g01 1.2 en/uvlo (v) 1.22 1.26 1.24 1.28 1.3 rising falling temperature (c) C50 0 50 75 C25 25 100 125 150 3798 g02 10 10.5 en/uvlo hysteresis current (a) 11 11.5 12 temperature (c) C50 0 50 75 C25 25 100 125 150 3798 g03 0 i q (a) 20 10 30 40 60 50 100 90 80 70 v in = 12v v in = 24v temperature (c) C50 1.900 v ref (v) 1.925 1.975 2.000 2.025 2.100 2.075 0 50 75 1.950 2.050 C25 25 100 125 150 3798 g05 v in = 24v with no load v in = 24v with 200a load v in (v) 10 1.95 v ref (v) 1.96 1.98 1.99 2 2.01 2.05 2.03 2.04 1.97 2.02 15 25 20 30 35 40 3798 g05 no load 200a load temperature (c) C50 0 current limit (ma) 20 60 80 100 120 0 50 75 40 C25 25 100 125 150 3798 g06 max i lim min i lim v in_sense = 34a min i lim v in_sense = 21a temperature (c) C50 120 frequency (khz) 145 195 220 0 50 75 170 C25 25 100 125 150 3798 g06a temperature (c) C50 0 frequency (khz) 2 3 4 5 0 50 75 1 C25 25 125100 150 3799 g07 v fb < v ovp v ovp > v fb temperature (c) C50 0 frequency (khz) 10 15 20 25 0 50 75 5 C25 25 125100 150 3798 g07a lt3798 5 3798f typical performance characteristics intv cc vs temperature intv cc vs v in v in shunt voltage vs temperature maximum shunt current vs temperature t a = 25c, unless otherwise noted. leakage inductance blanking time vs sense current limit threshold temperature (c) C50 9.5 intv cc (v) 9.75 10.25 10.5 0 50 75 10 C25 25 100 125 150 3798 g08 25ma load 10ma load no load v in (v) 515 25 30 10 20 35 40 3798 g09 9 intv cc (v) 9.2 9.4 9.6 9.8 10 10.2 temperature (c) C50 0 50 75 C25 25 100 125 150 3798 g10 39 v in shunt voltage (v) 39.5 40 40.5 41 41.5 42 i shunt = 1ma temperature (c) C50 0 50 75 C25 25 100 125 150 3798 g11 5 shunt current (ma) 6 7 8 9 10 sense current limit threshold (mv) 0 60 80 20 40 100 120 3798 g12 0 0.2 leakage inductance blanking time (s) 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 output voltage vs input voltage v out vs temperature output current vs input voltage v in (vac) 90 23.6 v out (v) 23.8 24.6 24.2 170 210 230 24.4 24 150130110 190 250 270 3798 g13 page 17 schematic: universal v in (vac) 90 0.90 output current (a) 0.95 1.00 1.05 1.10 210 230 130 110 170150 190 250 270 3798 g14 page 17 schematic: universal v out = 22v temperature (c) C50 23 v out (v) 24 24.5 25 0 50 75 23.5 C25 25 125100 150 3798 g012a page 17 schematic: universal vac = 120v vac = 220v lt3798 6 3798f ctrl1, ctrl2, ctrl3 (pin 1, pin 2, pin 3): current output adjustment pins. these pins control the output current. the lowest value out of the three ctrl inputs is compared to negative input of the operational amplifier. v ref (pin 4): voltage reference output pin. typically 2v. this pin drives a resistor divider for the ctrl pin, either for analog dimming or for temperature limit/compensation of output load. can supply up to 200a. ovp (pin 5): overvoltage protection. this pin accepts a dc voltage to compare to the sample and holds voltage output information. when output voltage information is above the ovp , the part divides the minimum switching frequency by 8, around 500hz. this protects devices con- nected to the output. this also allows the part to operate with very little power consumption with no load to meet energy star requirements. vc (pin 6): compensation pin for internal error amplifier. connect a series rc from this pin to ground to compensate the switching regulator. a 100pf capacitor in parallel helps eliminate noise. comp + , comp C (pin 7, pin 8): compensation pins for internal error amplifier. connect a capacitor between these two pins to compensate the internal feedback loop. fb (pin 9): voltage loop feedback pin. fb is used to regulate the output voltage by sampling the third wind- ing. if the converter is used in current mode, the fb pin will normally be at a voltage level lower than 1.25v, and will reach the steady state of 1.25v if it detects an open output condition. dcm (pin 10): discontinuous conduction mode detection pin. connect a capacitor and resistor in series with this pin to the third winding. v in (pin 11): input voltage. this pin supplies current to the internal start-up circuitry and to the intv cc ldo. this pin must be locally bypassed with a capacitor. a 42v shunt regulator is internally connected to this pin. en/uvlo (pin 12): enable/undervoltage lockout. a resis- tor divider connected to v in is tied to this pin to program the minimum input voltage at which the lt3798 will turn on. when below 1.25v, the part will draw 60a with most of the internal circuitry disabled and a 10a hysteresis current will be pulled out of the en/uvlo pin. when above 1.25v, the part will be enabled and begin to switch and the 10a hysteresis current is turned off. intv cc (pin 13): regulated supply for internal loads and gate driver. supplied from v in and regulates to 10v (typical). intv cc must be bypassed with a 4.7f capacitor placed close to the pin. pin functions power factor vs input voltage efficiency vs input voltage v in (vac) 90 0.90 0.92 0.91 0.95 0.96 0.97 0.98 0.99 1.00 150 210190 230 0.93 0.94 130110 170 250 270 3798 g15 power factor page 17 schematic: universal v in (vac) 90 60 efficiency (%) 70 80 90 100 150 210190 230 130110 170 250 270 3798 g16 page 17 schematic: universal typical performance characteristics t a = 25c, unless otherwise noted. lt3798 7 3798f pin functions block diagram v out + v out C v rectified d1 c7 l1a t1 n:1 l1b c2 sw1 r1 r3 c3 1.22v v in r14 r13 d2 l1c t c1 r15 r4 r5 v in_sense en/uvlo dcm startup internal reg v ref ovp fb s&h comp + comp C ctrl1 ctrl3 ctrl2 fb s&h vc 1.22v c6 c4 r8 r9 r10 + C a8 C + a5 a6 minimum multiplier a3 r12 1m + C 600mv one shot + C a2 + C a1 current comparator r q s s master latch low output current oscillator a4 r11 r7 driver gnd gate intv cc sense r6 c5 3798 bd C + a7 a9 gate (pin 14): n-channel fet gate driver output. switches between intv cc and gnd. driven to gnd during shutdown state and stays high during low voltage states. sense (pin 15): the current sense input for the control loop. kelvin connect this pin to the positive terminal of the switch current sense resistor, r sense , in the source of the nfet. the negative terminal of the current sense resistor should be connected to the gnd plane close to the ic. v in_sense (pin 16): line voltage sense pin. the pin is used for sensing the ac line voltage to perform power factor correction. connect a resistor in series with the line voltage to this pin. if no pfc is needed, connect this pin to intv cc with a 25k resistor. gnd (exposed pad pin 17): ground. the exposed pad of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. the exposed pad must be soldered to the circuit board for proper operation. lt3798 8 3798f the lt3798 is a current mode switching controller ic designed specifically for generating a constant current/ constant voltage supply in an isolated flyback topology. the special problem normally encountered in such circuits is that information relating to the output voltage and cur- rent on the isolated secondary side of the transformer must be communicated to the primary side in order to maintain regulation. historically, this has been done with an opto-isolator. the lt3798 uses a novel method of using the external mosfets peak current information from the sense resistor to calculate the output current of a flyback converter without the need of an opto-coupler. active power factor correction is becoming a requirement for offline power supplies and the power levels are de- creasing. a power factor of one is achieved if the current drawn is proportional to the input voltage. the lt3798 modulates the peak current limit with a scaled version of the input voltage. this technique can provide power factors of 0.97 or greater. the block diagram shows an overall view of the system. the external components are in a flyback topology configura- tion. the third winding senses the output voltage and also supplies power to the part in steady-state operation. the v in pin supplies power to an internal ldo that generates 10v at the intv cc pin. the novel control circuitry consists of two error amplifiers, a minimum circuit, a multiplier, a transmission gate, a current comparator, a low output current oscillator and a master latch, which will be ex- plained in the following sections. the part also features a sample-and-hold to sample the output voltage from the third winding. a comparator is used to detect discontinu- ous conduction mode (dcm) with a cap connected to the third winding. the part features a 1.9a gate driver. the lt3798 is designed for both off-line and dc applica- tions. the en/uvlo and a resistor divider can be configured for a micropower hysteretic start-up. in the block diagram, r3 is used to stand off the high voltage supply voltage. the internal ldo starts to supply current to the intv cc when v in is above 2.5v. the v in and intv cc capacitors are charged by the current from r3. when v in exceeds the turn-on threshold and intv cc is in regulation at 10v, the operation part begins to switch. the v in hysteresis is set by the en/ uvlo resistor divider. the third winding provides power to v in when its voltage is higher than the v in voltage. a voltage shunt is provided for fault protection and can sink 8ma of current when v in is over 40v. during a typical cycle, the gate driver turns the external mosfet on and a current flows through the primary wind- ing. this current increases at a rate proportional to the input voltage and inversely proportional to the magnetizing inductance of the transformer. the control loop determines the maximum current and the current comparator turns the switch off when the current level is reached. when the switch turns off, the energy in the core of the transformer flows out the secondary winding through the output diode, d1. this current decreases at a rate proportional to the output voltage. when the current decreases to zero, the output diode turns off and voltage across the secondary winding starts to oscillate from the parasitic capacitance and the magnetizing inductance of the transformer. since all windings have the same voltage across them, the third winding rings too. the capacitor connected to the dcm pin, c1, trips the comparator a2, which serves as a dv/dt detector, when the ringing occurs. this timing information is used to calculate the output current and will be described below. the dv/dt detector waits for the ringing waveform to reach its minimum value and then the switch turns back on. this switching behavior is similar to zero volt switching and minimizes the amount of energy lost when the switch is turned back on and improves efficiency as much as 5%. since this part operates on the edge of continuous conduction mode and discontinuous conduction mode, the operating mode is called critical conduction mode (or boundary conduction mode). primary side control loops the lt3798 achieves constant current/constant voltage operation by using two separate error amplifiers. these two amplifiers are then fed to a circuit that outputs the lower voltage of the two, shown as the "minimum" block in the block diagram. this voltage is converted to a current before being fed into the multiplier. lt3798 9 3798f primary side current control loop the ctrl1/ctrl2/ctrl3 pins control the output current of the flyback controller. to simplify the loop, lets assume the v in_sense pin is held at a constant voltage above 1v eliminating the multiplier from the control loop. the error amplifier, a5, is configured as integrator with the external capacitor c6. the comp + node voltage is converted to a current into the multiplier with the v/i converter, a6. since a7s output is constant, the output of the multiplier is proportional to a6 and can be ignored. the output of the multiplier controls the peak current with its connection to the current comparator, a1. the output of the multiplier is also connected to the transmission gate, sw1, and to a 1m resistor. the transmission gate, sw1, turns on when the secondary current flows to the output capacitor. this is called the flyback period when the output diode d1 is on. the current through the 1m resistor gets integrated by a5. the lowest ctrl input is equal to the negative input of a5 in steady state. a current output regulator normally uses a sense resistor in series with the output current and uses a feedback loop to control the peak current of the switching converter. in this isolated case, the output current information is not available so instead the lt3798 calculates it using the in- formation available on the primary side of the transformer. the output current may be calculated by taking the average of the output diode current. as shown in figure 1, the diode current is a triangle waveform with a base of the flyback time and a height of the peak secondary winding current. in a flyback topology, the secondary winding current is n times the primary winding current, where n ps is the primary to secondary winding ratio. instead of taking the area of the triangle, lets think of it as a pulse width modulation (pwm) waveform. during the flyback time, the average current is half the peak secondary winding current and zero during the rest of the cycle. the equation to express the output current is: i out = 0.5 ? i pk ? n ps ? d where d is equal to the percentage of the cycle that the flyback time represents. the lt3798 has access to the primary winding current, the input to the current com- parator, and when the flyback time starts and ends. now the output current can be calculated by averaging a pwm waveform with a height of the current limit and a duty cycle of the flyback time over the entire cycle. in the feedback loop described above, the input to the integrator is such a waveform. the integrator adjusts the peak current until calculated output current equals the control voltage. if the calculated output current is low compared to the control pin, the error amplifier increases the voltage on the comp + node thus increasing the current comparator input. primary side voltage control the output voltage is available through the third winding on the primary side. a resistor divider attenuates the output voltage for the voltage error amplifier. a sample-and-hold circuit samples the attenuated output voltage and feeds it to the error amplifier. the output of the error amplifier is the vc pin. this node needs a capacitor to compensate the output voltage control loop. power factor correction when the v in_sense voltage is connected to a resistor divider of the supply voltage, the current limit is proportional to the supply voltage. the minimum of the two error ampli- fier outputs is multiplied with the v in_sense pin voltage. if the lt3798 is configured with a fast control loop, slower changes from the v in_sense pin would not interfere with the current limit or the output current. the comp + pin would adjust to the changes of the v in_sense . the only way for the multiplier to function is to set the control loop to be an order of magnitude slower than the fundamental frequency of the v in_sense signal. in an offline case, the operation figure 1. secondary diode current and switch waveforms 3798 f01 t flyback t period secondary diode current switch waveform i pk(sec) lt3798 10 3798f fundamental frequency of the supply voltage is 120hz so the control loop unity gain frequency needs to be set less than approximately 12hz. without a large amount of energy storage on the secondary side, the output current will be affected by the supply voltage changes, but the dc com- ponent of the output current will be accurate. for dc input or non-pfc ac input applications, connect a 25k resistor from v in_sense to intv cc instead of the ac line voltage. startup the lt3798 uses a hysteretic start-up to operate from high offline voltages. a resistor connected to the supply voltage protects the part from high voltages. this resistor is connected to the v in pin on the part and bypassed with a capacitor. when the resistor charges the v in pin to a turn-on voltage set with the en/uvlo resistor divider and the intv cc pin is at its regulation point, the part begins to switch. the resistor cannot provide power for the part in steady state, but relies on the capacitor to start-up the part, then the third winding begins to provide power to the v in pin along with the resistor. an internal voltage clamp is attached to the v in pin to prevent the resistor current from allowing v in to go above the absolute maximum voltage of the pin. the internal clamp is set at 40v and is capable of 8ma(typical) of current at room temperature. setting the v in turn-on and turn-off voltages a large voltage difference between the v in turn-on voltage and the v in turn-off voltage is preferred to allow time for the third winding to power the part. the en/uvlo sets these two voltages. the pin has a 10a current sink when the pins voltage is below 1.25v and 0a when above 1.25v. the v in pin connects to a resistor divider as shown in figure 2. the uvlo threshold for v in rising is: v in(uvlo,rising) = 1.25v ? r1 + r2 () r2 + 10a ? r1 the uvlo threshold for v in falling is : v in(uvlo,falling) = 1.25v ? r1 + r2 () r2 programming output voltage the output voltage is set using a resistor divider from the third winding to the fb pin. from the block diagram, the resistors r4 and r5 form a resistor divider from the third winding. the fb also has an internal current source that compensates for the diode drop. this current source causes an offset in the output voltage that needs to be ac- counted for when setting the output voltage. the output voltage equation is: v out = v bg (r4+r5)/(n st ? r5)C(v f + (r4 ? i tc )/n st ) where v bg is the internal reference voltage, n st is the winding ratio between the secondary winding and the third winding, v f is the forward drop of the output rectifying diode, and i tc is the internal current source for the fb pin. the temperature coefficient of the diode's forward drop needs to be the opposite of the term, (r4 ? i tc )/n st . by taking the partial derivative with respect to temperature, the value of r4 is found to be the following: r4 = n st (1/(i tc /t)(v f /t)) i tc /t = 12.4na/c i tc = 4.25a where i tc /t is the partial derivative of the i tc current source, and v f / t is the partial derivative of the forward drop of the output rectifying diode. with r4 set with the above equation, the resistor value for r5 is found using the following: r5 = (v bg ? r4)/(n st (v out +v f )+r4 ? i tc -v bg ) operation lt3798 en/uvlo gnd r2 r1 v in 3798 f02 figure 2. undervoltage lockout (uvlo) lt3798 11 3798f programming output current the maximum output current depends on the supply volt- age and the output voltage in a flyback topology. with the v in_sense pin connected to 100a current source and a dc supply voltage, the maximum output current is determined at the minimum supply voltage, and the maximum output voltage using the following equation: i out(max) = 2 ? (1C d) ? n ps 42 ?r sense where d = v out ?n ps v out ?n ps + v in the maximum control voltage to achieve this maximum output current is 2v ? (1-d). it is suggested to operate at 95% of these values to give margin for the parts tolerances. when designing for power factor correction, the output current waveform is going to have a half sine wave squared shape and will no longer be able to provide the above currents. by taking the integral of a sine wave squared over half a cycle, the average output current is found to be half the value of the peak output current. in this case, the recommended maximum average output current is as follows: i out(max) = 2 ? (1 ? d) ? n ps 42 ?r sense ? 47.5% where d = v out ?n ps v out ?n ps + v in the maximum control voltage to achieve this maximum output current is (1-d) ? 47.5%. for control voltages below the maximum, the output cur- rent is equal to the following equation: i out = ctrl ? n ps 42 ?r sense the v ref pin supplies a 2v reference voltage to be used with the control pins. to set an output current, a resistor divider is used from the 2v reference to one of the control pins. the following equation sets the output current with a resistor divider: r1 = r2 2n ps 42 ?i out ?r sense C1 ? ? ? ? ? ? where r1 is the resistor connected to the v ref pin and the ctrl pin and r2 is the resistor connected to the ctrl pin and ground. setting v in_sense resistor the v in_sense resistor sets the current feeding the internal multiplier that modulates the current limit for power factor correction. at the maximum line voltage, v max , the current is set to 360a. under this condition, the resistor value is equal to (v max /360a). for dc input or non-pfc ac input applications, connect a 25k resistor from v in_sense to intv cc instead of the ac line voltage. critical conduction mode operation critical conduction mode is a variable frequency switching scheme that always returns the secondary current to zero with every cycle. the lt3798 relies on boundary mode and discontinuous mode to calculate the critical current because the sensing scheme assumes the secondary current returns to zero with every cycle. the dcm pin uses a fast current input comparator in combination with a small capacitor to detect dv/dt on the third winding. to eliminate false trip- ping due to leakage inductance ringing, a blanking time of between 600ns and 2s is applied after the switch turns off, depending on the current limit shown in the leakage in- ductance blanking time vs sense current limit threshold curve in the typical performance characteristics section. the detector looks for 80a of current through the dcm pin due to falling voltage on the third winding when the secondary diode turns off. this detection is important since the output current is calculated using this comparators output. this is not the optimal time to turn the switch on because the switch voltage is still close to v in + v out ? n ps and would waste all the energy stored in the parasitic ca- pacitance on the switch node. discontinuous ringing begins when the secondary current reaches zero and the energy in the parasitic capacitance on the switch node transfers operation lt3798 12 3798f operation to the input capacitor. this is a second-order network composed of the parasitic capacitance on the switch node and the magnetizing inductance of the primary winding of the transformer. the minimum voltage of the switch node during this discontinuous ring is v in C v out ? n ps . the lt3798 turns the switch back on at this time, during the discontinuous switch waveform, by sensing when the slope of the switch waveform goes from negative to positive using the dv/dt detector. this switching technique may increase efficiency by 5%. sense resistor selection the resistor, r sense , between the source of the external n-channel mosfet and gnd should be selected to provide an adequate switch current to drive the application without exceeding the current limit threshold. for applications without power factor correction, select a resistor according to: r sense = 2(1C d)n ps i out ?42 ? 95% where d = v out ?n ps v out ?n ps + v in for applications with power factor correction, select a resistor according to: r sense = 2(1C d)n ps i out ?42 ? 47.5% where d = v out ?n ps v out ?n ps + v in minimum current limit the lt3798 features a minimum current limit of approxi- mately 18% of the peak current limit. this is necessary when operating in critical conduction mode since low current limits would increase the operating frequency to a very high frequency. the output voltage sensing circuitry needs a minimum amount of flyback waveform time to sense the output voltage on the third winding. the time needed is 350ns. the minimum current limit allows the use of smaller transformers since the magnetizing primary inductance does not need to be as high to allow proper time to sample the output voltage information. to help improve crossover distortion of the line input current, a second minimum current limit of 6% becomes active when the v in_sense current is lower than 27a. since the off-time becomes very short with this lower minimum current limit, the sample-and-hold is deactivated. universal input the lt3798 operates over the universal input voltage range of 90vac to 265vac. in the typical performance characteristics section, the output voltage vs v in and the output current vs v in graphs, show the output voltage and output current line regulation for the first application picture in the typical applications section. selecting winding turns ratio boundary mode operation gives a lot of freedom in selecting the turns ratio of the transformer. we suggest to keep the duty cycle low, lower n ps , at the maximum input voltage since the duty cycle will increase when the ac waveform decreases to zero volts. a higher n ps increases the output current while keeping the primary current limit constant. although this seems to be a good idea, it comes at the expense of a higher rms current for the secondary-side diode which might not be desirable because of the primary side mosfets superior performance as a switch. a higher n ps does reduce the voltage stress on the secondary-side diode while increasing the voltage stress on the primary- side mosfet. if switching frequency at full output load is kept constant, the amount of energy delivered per cycle by the transformer also stays constant regardless of the n ps . therefore, the size of the transformer remains the same at practical n ps s. adjusting the turns ratio is a good way to find an optimal mosfet and diode for a given application. lt3798 13 3798f switch voltage clamp requirement leakage inductance of an offline transformer is high due to the extra isolation requirement. the leakage inductance energy is not coupled to the secondary but goes into the drain node of the mosfet. this is problematic since 400v and higher rated mosfets cannot always handle this energy by avalanching. therefore the mosfet needs protection. a transient voltage suppressor (tvs) and diode are recommended for all offline application and connected, as shown in figure 3. the tvs device needs a reverse breakdown voltage greater than (v out + v f ) ? n ps where v out is the output voltage of the flyback converter, v f is the secondary diode forward voltage, and n ps is the turns ratio. an rcd clamp can be used in place of the tvs clamp. period, as well. similarly, initial values can be estimated using stated switch capacitance and transformer leakage inductance. once the value of the drain node capacitance and inductance is known, a series resistor can be added to the snubber capacitance to dissipate power and criti- cally dampen the ringing. the equation for deriving the optimal series resistance using the observed periods (t period , and t period(snubbed) ) and snubber capacitance (c snubber ) is below, and the resultant waveforms are shown in figure 4. operation figure 3. tvs & rcd switch voltage clamps 3798 f03 gate v supply gate v supply in addition to clamping the spike, in some designs where short circuit protection is desired, it will be necessary to decrease the amount of ringing by using an rc snubber. leakage inductance ringing is at its worst during a short circuit condition, and can keep the converter from cycling on and off by peak charging the bias capacitor. on/off cycling is desired to keep power dissipation down in the output diode. alternatively, a heat sink can be used to manage diode temperature. the recommended approach for designing an rc snubber is to measure the period of the ringing at the mosfet drain when the mosfet turns off without the snubber and then add capacitancestarting with something in the range of 100pfuntil the period of the ringing is 1.5 to 2 times longer. the change in period will determine the value of the parasitic capacitance, from which the parasitic inductance can be determined from the initial figure 4. observed waveforms at mosfet drain when iteratively implementing an rc snubber time (s) 0 0 v drain (v) 10 30 40 50 0.20 90 3798 f04 20 0.10 0.05 0.25 0.15 0.30 60 70 80 no snubber with snubber capacitor with resistor and capacitor c par = c snubber t period(snubbed) t period ? ? ? ? ? ? 2 C1 l par = t period 2 c par ?4 2 r snubber = l par c par note that energy absorbed by a snubber will be converted to heat and will not be delivered to the load. in high volt- age or high current applications, the snubber may need to be sized for thermal dissipation. to determine the power dissipated in the snubber resistor from capacitive losses, measure the drain voltage immediately before the mos- fet turns on and use the following equation relating that lt3798 14 3798f voltage and the mosfet switching frequency to determine the expected power dissipation: p snubber = f sw ? c snubber ? v drain 2 /2 decreasing the value of the capacitor will reduce the dis- sipated power in the snubber at the expense of increased peak voltage on the mosfet drain, while increasing the value of the capacitance will decrease the overshoot. transformer design considerations transformer specification and design is a critical part of successfully applying the lt3798. in addition to the usual list of caveats dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. since the current on the secondary side of the transformer is inferred by the current sampled on the primary, the transformer turns ratio must be tightly controlled to ensure a consistent output current. a tolerance of 5% in turns ratio from transformer to transformer could result in a variation of more than 5% in output regulation. fortunately, most magnetic component manufacturers are capable of guaranteeing a turns ratio tolerance of 1% or better. linear technology has worked operation table 1. predesigned transformerstypical specifications, unless otherwise noted transformer part number size (l w h) l pri (h) n psa (n p :n s :n a ) r pri (m) r sec (m) manufacturer target application (v out /i out ) ja4429 21.1mm 21.1mm 17.3mm 400 1:0.24:0.24 252 126 coilcraft 22v/1a 7508110210 15.75mm 15mm 18.5mm 2000 6.67:1:1.67 5100 165 wrth elektronik 10v/0.4a 750813002 15.75mm 15mm 18.5mm 2000 20:1.0:5.0 6100 25 wrth elektronik 3.8v/1.1a 750811330 43.2mm 39.6mm 30.5mm 300 6:1.0:1.0 150 25 wrth elektronik 18v/5a 750813144 16.5mm 18mm 18mm 600 4:1:0.71 2400 420 wrth elektronik 28v/0.5a 750813134 16.5mm 18mm 18mm 600 8:1:1.28 1850 105 wrth elektronik 14v/1a 750811291 31mm 31mm 25mm 400 1:1:0.24 550 1230 wrth elektronik 85v/0.4a 750813390 43.18mm 39.6mm 30.48mm 100 1:1:0.22 150 688 wrth elektronik 90v/1a 750811290 31mm 31mm 25mm 460 1:1:0.17 600 560 wrth elektronik 125v/0.32a x-11181-002 23.5mm 21.4mm 9.5mm 500 72:16:10 1000 80 premo 30v/0.5a 750811248 31mm 31mm 25mm 300 4:1.0:1.0 280 25 wrth elektronik 24v/2a s001621 25mm 22.2mm 16mm 820 16:1.0:4.0 1150 10 renco 5v/4a 750312872 43.2mm 39.6mm 30.5mm 14 1:1:0.8 11 11 wrth elektronik 28v/4a with several leading magnetic component manufacturers to produce predesigned flyback transformers for use with the lt3798. table 1 shows the details of several of these transformers. loop compensation the voltage feedback loop is a traditional gm error ampli- fier. the loop cross-over frequency is set much lower than twice the line frequency for pfc to work properly. the current output feedback loop is an integrator con- figuration with the compensation capacitor between the negative input and output of the operational amplifier. this is a one-pole system therefore a zero is not needed in the compensation. for offline applications with pfc, the crossover should be set an order of magnitude lower than the line frequency of 120hz or 100hz. in a typical application, the compensation capacitor is 0.1f. in non-pfc applications, the crossover frequency may be increased to improve transient performance. the desired crossover frequency needs to be set an order of magnitude below the switching frequency for optimal performance. lt3798 15 3798f operation mosfet and diode selection with a strong 1.9a gate driver, the lt3798 can effectively drive most high voltage mosfets. a low qg mosfet is recommended to maximize efficiency. in most applications, the r ds(on) should be chosen to limit the temperature rise of the mosfet. the drain of the mosfet is stressed to v out ? n ps + v in during the time the mosfet is off and the secondary diode is conducting current. but in most applications, the leakage inductance voltage spike exceeds this voltage. the voltage of this stress is determined by the switch voltage clamp. always check the switch waveform with an oscilloscope to make sure the leakage inductance voltage spike is below the breakdown voltage of the mos- fet. a transient voltage suppressor and diode are slower than the leakage inductance voltage spike, therefore causing a higher voltage than calculated. the secondary diode stress may be as much as v out + 2 ? v in /n ps due to the anode of the diode ringing with the secondary leakage inductance. an rc snubber in parallel with the diode eliminates this ringing, so that the reverse voltage stress is limited to v out + v in /n ps . with a high n ps and output current greater than 3a, the i rms through the diode can become very high and a low forward drop schottky is recommended. discontinuous mode detection the discontinuous mode detector uses ac-coupling to detect the ringing on the third winding. a 22pf capacitor with a 30k resistor in series is recommended in most designs. depending on the amount of leakage inductance ringing, an additional current may be needed to prevent false tripping from the leakage inductance ringing. a resis- tor from intv cc to the dcm pin adds this current. up to an additional 100a of current may be needed in some cases. the dcm pin is roughly 0.7v, therefore the resistor value is selected using the following equation: r = 10v C 0.7v i where i is equal to the additional current into the dcm pin. power factor correction/harmonic content the lt3798 attains high power factor and low harmonic content by making the peak current of the main power switch proportional to the line voltage by using an internal multiplier. a power factor of >0.97 is easily attainable for most applications by following the design equations in this data sheet. with proper design, lt3798 applications can easily meet most harmonic standards. operation under light output loads the lt3798 detects output overvoltage conditions by looking at the voltage on the third winding. the third winding voltage is proportional to the output voltage when the main power switch is off and the secondary diode is conducting current. sensing the output voltage requires delivering power to the output. when the output current is very low, this periodic delivery of output current can exceed the load current. the ovp pin sets the output overvolt- age threshold. when the output of the sample-and-hold is above this voltage, the minimum switching frequency is divided by 8 as shown in figure 5. this ovp threshold needs to be set above 1.35v and should be set out of the way of output voltage transients. the output clamp point is set with the following formula: v out = v ovp (r4 + r5)/(n st ? r5)C(v f + (r4?i tc )/n st ) the v ovp pin voltage may be provided by a resistor divider from the v ref pin. this frequency division greatly reduces the output current delivered to the output but a zener or resistor is required to dissipate the remaining output cur- rent. the zener diodes voltage needs to be 5% higher than the output voltage set by the resistor divider connected to the fb pin. multiple zener diodes in series may be needed for higher output power applications to keep the zeners temperature within the specification. lt3798 16 3798f protection from shorted output conditions during a shorted output condition as shown in figure 6, the lt3798 operates at the minimum operating frequency. in normal operation, the third winding provides power to the ic, but the third winding voltage is zero during a shorted condition. this causes the parts v in uvlo to shutdown switching. the part starts switching again when v in has reached its turn-on voltage. operation usage with dc input voltage the lt3798 is flexible enough to operate well from low voltage to very high voltage dc input voltage applications. when the supply voltage is less than 40v, the startup re- sistor is not needed and the part's v in can be connected directly to the supply voltage. the startup sequence for voltages higher than 40v is the same as what is described for high voltage offline supply voltages. the loop compensation component values can be chosen to provide faster loop response since the lt3798 does not have to provide pfc for the slow 50hz/60hz ac input voltage. for dc input applications, connect a 25k resistor from v in_sense to intv cc . v 3rd winding 20v/div v out 10v/div i out 1a/div 3798 f05 1ms/div figure 5. switching waveforms when output open-circuits or at very light load conditions figure 6. switching waveforms when output short-circuits v in 20v/div v 3rd winding 50v/div i pri 1a/div 3798 f06 100ms/div lt3798 17 3798f typical applications 3798 ta02 v in_sense v in dcm fb v ref ctrl2 ctrl1 gate sense intv cc gnd lt3798 comp + vc comp C c10 560 f 2 br1: diodes, inc. hd06 c8: vishay 440ld22-r d1: central semiconductor cmr1u-06m d2, d3: diodes inc. bav20w d4: central semiconductor cmr1u-02m m1: fairchild fdpf15n65 t1: coilcraft ja4429-al z1: fairchild smbj170a z2: central semiconductor cmz5937b c4 4.7pf c5 10 f c8 2.2nf 4:1:1 c7, 0.1f r16 20 r17 20 d2 d4 z1 d1 r s 0.05 r4 499k r3 499k r8 100k r7 100k r15 4.99k c6 22pf r14 90.9k ctrl3 en/uvlo r9 40.2k r11 100k r10 16.5k c3 2.2f ovp r12 221k c9 4.7f r13 2k d3 z2 y1 cap m1 24v 1a r6 95.3k r5 1m 90v to 265v ac c2 0.1f c1 0.068f br1 l1 33mh l2 800h + universal input 24w pfc bus converter lt3798 18 3798f typical applications 3798 ta03 v in_sense v in dcm fb v ref ctrl2 ctrl1 gate sense intv cc gnd lt3798 comp + vc comp C c10 1000 f 2 c11 10 f 2 br1: diodes, inc. hd06 c8: vishay 440ld22-r c11: murata grm32er7ya106ka12l d1: central semiconductor cmr1u-06m d2, d3: diodes inc. bav20w d4: diodes inc. sbr20a200ctb m1: infineon ipb60r165cp t1: wrth elektronik 750811248 z1: fairchild smbj170a z2: central semiconductor cmz5937b c4 22pf c5 10 f c8 2.2nf 4:1:1 c3 1f c7, 0.1f r16 20 r17 47 d2 d4 m1 z1 z2 d1 r s 0.03 r4 499k r3 499k r8 100k r7 100k r15 5.49k c6 22pf r14 100k ctrl3 en/uvlo ovp r9 40.2k r10 31.6k r12 221k r11 100k r5 2.4m r6 301k c9 4.7f r13 33k d3 24v 2a 90v to 265v ac c2 0.22f c1 0.1f br1 l2 27mh l1 1mh + y1 cap universal input 48w pfc application lt3798 19 3798f package description msop (mse16) 0911 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16 16151413121110 12345678 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail b detail b corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package 16-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1667 rev e) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. lt3798 20 3798f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0212 ? printed in usa related parts typical application part number description comments lt3799/lt3799-1 offline isolated flyback led controller with active pfc no opto-coupler required, triac dimmable, v in and v out limited only by external components, msop-16e lt3748 100v isolated flyback controller 5v v in 100v, no opto flyback , msop-16 with high voltage spacing lt3573/lt3574/lt3575 40v isolated flyback converters monolithic no-opto flybacks with integrated 1.25a/0.65a/2.5a switch lt3511/lt3512 100v isolated flyback converters monolithic no-opto flybacks with integrated 240ma/420ma switch lt3757/lt3758 40v/100v flyback/boost controllers universal controllers with small package and powerful gate drive lt3957/lt3958 40v/100v flyback/boost converters monolithic with integrated 5a/3.3a switch ltc3803/ltc3803-3/ltc3803-5 200khz/300khz flyback controllers v in and v out limited only by external components ltc3805/ltc3805-5 adjustable frequency flyback controllers v in and v out limited only by external components 3798 ta04 v in_sense v in dcm fb v ref ctrl2 ctrl1 gate sense intv cc gnd lt3798 comp + vc comp C c10 10 f 4 c2: tdk c5750x7s2a106m c8: vishay 440ld22-r c10: murata grm32er7ya106ka12l d1: diodes inc. dfls1150 d2, d3: diodes inc. bav20w d4: on semiconductor mbr20200ct d5: diodes inc. dfls2100 c4 15pf c5 10 f c8 2.2nf c6 22pf 1:1:0.8 c3 0.1f c7, 22nf r17 20 d2 d4 m1 z1 z2 y1 cap d1 z3 d5 r s 0.004 r4 24k to intv cc r8 6.8k r7 6.8k r15 5.9k r14 100k ctrl3 en/uvlo ovp r9 40.2k r10 34.8k r3 16.2k r12 221k r11 100k r5 402k r6 51.1k c9 4.7f r13 15k d3 28v 4a c2 10f v in 20v to 60v m1: fairchild fdp2532 t1: wrth elektronik 750312872 z1: diodes inc. smcj60a z2: central semiconductor cmz59398 z3: fairchild smbj170a 112w wide dc input industrial power supply |
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